因為2-input logic, 以NAND, NOR gate 作出來的area 最小若只要AND, OR, 就加inverter ... NAND由兩個串聯的NMOS和兩個並聯的PMOS組合而成 ... <看更多>

The current through the resistor can cause the source voltage to rise enough to where a high logic value on the bottom MOSFET gate does not switch the ... ... <看更多>

Using NMOS devices in series and PMOS in parallel (as in the NAND gate) makes it easier to design a logic gate with the ideal switching point voltage of VDDI2. ... <看更多>